Desktop Motherboard Power Sequence Pdf 〈Newest〉
Understanding the Desktop Motherboard Power Sequence Have you ever wondered why your PC doesn't just "turn on" instantly when you hit the button? There is actually a highly orchestrated chain of electrical signals happening in the background called the Power Sequence
Understanding this sequence is the "secret sauce" for anyone looking to repair dead motherboards or troubleshoot persistent boot failures. The Core Stages of Power-On
A typical desktop motherboard follows these critical steps to transition from a "dead" state to a fully functional one: Standby Voltage (S5 State):
Before you even touch the power button, the Power Supply Unit (PSU) sends a +5VSB (Standby)
voltage to the I/O chip (SIO). If this light isn't on, check your PSU or wall outlet first. The Trigger: desktop motherboard power sequence pdf
Pressing the power button sends a signal to the SIO, which then communicates with the South Bridge (PCH). Wake-Up Signals: The South Bridge responds with
(Sleep) signals back to the SIO, essentially giving "permission" to wake the rest of the board. Full Power Rails: The PSU then activates the main +3.3V, +5V, and +12V
lines. Power is delivered to the RAM first, followed by the Chipset (PCH/North Bridge). VCORE & VRM Activation:
Once the board's internal voltages are stable, the Voltage Regulator Module (VRM) generates the CPU Core Voltage (VCORE) The Power Good (PG) Signal: 3) Typical power sequence (ordered steps)
When all voltages are within acceptable ranges, a "Power Okay" or "Power Good" signal is sent to the CPU. Reset & BIOS Execution: Finally, the system sends a
signal. The CPU wakes up, fetches the first instructions from the , and begins the POST (Power-On Self-Test). Quick Troubleshooting Tips
If your board is failing, you can use these checkpoints to narrow down the culprit:
3) Typical power sequence (ordered steps)
- Standby present: +5VSB is present from PSU (always-on). EC, RTC, and standby logic powered.
- User request / event: Power button press, RTC alarm, or wake event signals EC.
- PS_ON# asserted: EC or power button logic pulls PS_ON# low to request main rails.
- PSU turns on main rails: +12V, +5V, +3.3V come up; their rise times depend on PSU design.
- Power supervision: PSU monitors rail stability; PWR_OK remains inactive until rails stable.
- VRM sequencing: Motherboard enables VRMs in the required order (often +3.3V for controllers, then CPU VCCIO/VCCSA, then Vcore) with controlled slew/soft-start.
- Clock & chipset init: Clock generator enables system clocks once core rails are stable.
- Deassert nRST (release CPU reset): After PWR_OK and clocks stable, motherboard releases CPU reset, allowing CPU to start executing firmware.
- Firmware execution: BIOS/UEFI, EC, ME/firmware initialize; devices enumerated; OS handoff later.
- PWR_OK assertion: PSU asserts PWR_OK to indicate sustained stability (this may occur earlier in step 8 depending on board).
- OS boot / S0 state: System reaches working state.
Power-down / sleep reverse: SLP signals, OS request, EC deasserts PS_ON#, VRMs ramp down in safe order, clocks stop, PWR_OK deasserts, PSU turns off main rails; +5VSB remains. Standby present: +5VSB is present from PSU (always-on)
2. Power States (ACPI)
- G3 (Mechanical Off)
- G2/S5 (Soft Off)
- G1 Sleeping states: S1, S2, S3 (Suspend to RAM), S4 (Suspend to Disk)
- G0/S0 (Working)
Part 7: Creating Your Own Power Sequence Checklist (From Multiple PDFs)
No single PDF covers every board. The smart technician creates a hybrid checklist:
| Stage | Signal/Rail | Typical Voltage | Expected After (ms) | IC/Source | |-------|-------------|----------------|---------------------|------------| | 0 | VSB | 3.3V | Always | PSU + LDO | | 1 | PS_ON# | 0V | Button press | SIO | | 2 | PWR_OK | 5V | +400ms | PSU | | 3 | +3.3V | 3.3V | +500ms | PSU | | 4 | VDD_SPD | 3.3V | +550ms | PCH | | 5 | DRAM_VDD | 1.2V | +600ms | VRM | | 6 | VCC_CORE | 0.9V | +700ms | CPU VRM | | 7 | CPU_PWRGD | 3.3V | +800ms | VRM controller | | 8 | PLTRST# | 3.3V | +900ms | PCH |
Print this grid and keep it near your repair bench. Combine data from Intel’s PDF + your board’s schematic.
6) Diagnostics checklist (quick)
- Confirm +5VSB present.
- Verify PS_ON# is pulled low when power button pressed.
- Measure main rails rise and check for correct voltages.
- Check PWR_OK timing relative to rails.
- Observe nRST release after clocks stable.
- Look for stuck EC or failed VRM MOSFETs if rails never enable.
- Inspect capacitors, shorted components, solder joints.
Failure 1: No 3VSB
- Symptom: No LED on board, CMOS cleared, won’t power on.
- Check in PDF: Look for “3VSB generation circuit” – often a linear regulator from 5VSB.
- Fix: Replace APL1087 or similar LDO.
3. Where to Find Free PDFs on This Topic
| Source | Search query | |--------|---------------| | Intel / AMD websites | “Intel desktop motherboard power sequence” + PDF | | Laptop repair forums (similar) | “ATX power sequence timing diagram PDF” | | University course repositories | “site:.edu motherboard power sequencing” | | Electronics repair sites | “Power good sequence motherboard PDF” | | GitHub / OpenCompute | “platform power sequencing specification” |
✅ Recommended search string (copy-paste into Google):
"power sequence" "motherboard" "ATX" filetype:pdf
Stage 6: CPU VRM Enable
- The PCH sends VRM_EN (or SLP_S4#) to the CPU voltage regulator controller.
- The VRM ramps VCC_CORE (VCORE) – typically 0.7V to 1.5V depending on load.
- When VCORE reaches 90% of target, the VRM asserts VRM_PWR_GOOD (also called PCH_PWROK).