Odrive 3.6 Schematic !!link!! May 2026

The ODrive v3.6 is a high-performance brushless motor controller that has become a staple in robotics for its ability to drive two motors with high peak power (over 1kW per channel). While it is now marked as Not Recommended for New Designs (NRND) in favor of newer models like the ODrive S1, it remains widely used in legacy systems and DIY builds.  Hardware Overview & Schematic Analysis 

The v3.6 hardware is essentially an evolution of the v3.5 design, with the primary difference being the move to a 4-layer board and variations in capacitor voltage ratings. 

Architecture: It uses a variable voltage DC bus that can fluctuate based on a battery's state of charge, typically managed via a DC-DC converter. Key Components: Microcontroller: STM32-based architecture.

Gate Driver: Commonly uses the DRV8301 for motor phase control.

Connectivity: Features USB, UART, CAN, and Step/Direction interfaces.

Availability of Documents: Official schematics for version 3.5 are often cited as the reference for v3.6 due to their near-identical nature. You can view the v3.5 Schematic on GitHub for detailed circuit info.  Performance & Capabilities 

Control Modes: Supports Position, Velocity, and Current control, with automatic identification of motor parameters like inductance and resistance.

Voltage Variants: Available in 24V (12V–24V) and 56V (12V–56V) versions.

Regenerative Braking: Designed to handle energy absorbed during deceleration, though users are cautioned to use high-power storage (like batteries) or brake resistors to avoid damaging power supplies.  Community & Clone Warnings 

The ODrive v3.6 has been widely cloned, most notably by Makerbase (MKS). 

ODriveHardware/v3/v3.5docs/schematic_v3.5.pdf at ... - GitHub

Provide feedback. We read every piece of feedback, and take your input very seriously. GitHub ODrive v3.6 (NRND)

The ODrive 3.6 schematic is the final iteration of the open-source v3 hardware series, designed for high-performance brushless motor control. While widely considered a robust "gold standard" for DIY robotics, it is now designated as Not Recommended for New Designs (NRND) in favor of the newer ODrive S1 and Pro models. Core Schematic Architecture

The hardware is essentially identical to the v3.5, featuring two independent motor control channels on a single PCB. odrive 3.6 schematic

Microcontroller: Powered by an STM32F405RGT6 (Cortex-M4 with FPU), providing high-speed FOC (Field Oriented Control) calculations.

Power Stage: Utilizes high-current MOSFETs and DRV8301 gate drivers.

Voltage Variants: Available in 24V (12V–24V) and 56V (12V–56V) versions.

Energy Management: Features a dedicated Brake Resistor port to dump regenerative energy, protecting the power supply from voltage spikes during deceleration. Technical Strengths

High Power Density: Capable of delivering over 1kW per channel (peak power) in a compact form factor.

Versatile Feedback: Native support for incremental encoders (with index pulse), Hall effect sensors, and SPI-based absolute encoders.

Rich Connectivity: Includes USB (Fibre protocol), UART, CAN, Step/Direction, and PWM inputs. Common Hardware Limitations & Issues ODrive v3.6 (NRND)

The ODrive v3.6 is a high-performance open-source motor controller designed to drive two brushless DC (BLDC) motors with precision using Field Oriented Control (FOC). Understanding its schematic is essential for integration, troubleshooting, and custom hardware development. Core Architecture and Microcontroller

The heart of the ODrive 3.6 hardware is the STM32F405RGT6 microcontroller. This ARM Cortex-M4 processor handles all real-time FOC calculations, communication protocols, and sensor processing.

Oscillator: A 8MHz crystal provides the base clock frequency for the MCU.

Status Indicators: The board includes status LEDs for immediate visual feedback on the controller's state. Power Stage and Gate Drivers

The v3.6 schematic features a robust power stage designed to handle significant current and voltage levels.

Gate Driver: It utilizes the TI DRV8301 gate driver. This chip integrates three-phase gate drivers, a buck converter (providing a 5V rail with up to 1.5A), and two current-sense amplifiers. The ODrive v3

Voltage Variants: The board is available in two versions: 24V (operating from 12V to 24V) and 56V (operating from 12V to 56V).

Regenerative Braking: To manage back-EMF during deceleration, the schematic includes a dedicated brake resistor port. This allows excess energy to be dissipated as heat rather than damaging the power supply. Connectivity and Interfaces

The ODrive v3.6 provides several interfaces for external control and feedback: CAN Bus Guide - ODrive Documentation

The ODrive 3.6 is the final iteration of the "classic" ODrive series and is highly regarded as a robust, high-performance brushless motor controller. While it has been largely succeeded by the ODrive Pro and S1 models, its open-source legacy means the schematic remains a critical reference for engineers and hobbyists. Schematic and Design Overview

The ODrive 3.6 schematic is essentially a refined version of the v3.5 design. It focuses on enabling high-performance Field Oriented Control (FOC) for two brushless motors simultaneously. Key Components:

MCU: Uses an STM32F405 microcontroller for high-speed computation.

Gate Drivers: Employs the DRV8301 gate driver, which includes integrated current sense amplifiers.

Power Stage: Designed for peak power over 1kW per channel, though practical limits depend on your cooling and power supply setup.

Voltage Variants: Available in 24V and 56V versions. The 56V variant uses higher voltage-rated capacitors to handle 12s-15s LiPo batteries. Common Reviews & Critical Feedback

Community feedback on the v3.6 hardware reveals several recurring themes:

ODrive v3.6 is a high-performance open-source motor controller designed for high-power Field Oriented Control (FOC) of brushless DC motors. Apache NuttX 1. Hardware Architecture

The ODrive v3.6 schematic is built around two primary integrated circuits that handle the core logic and power management: Microcontroller: It uses the STMicro STM32F405RG

, an ARM Cortex-M4 chip that executes the control algorithms and manages communications. Gate Driver: It employs the Texas Instruments DRV8301 Why Study the ODrive 3

, which includes a dual-bridge gate driver and an integrated buck converter to provide 5V power (up to 1.5A) to the board's logic. ODrive Community 2. Schematic Subsystems

The board's circuitry is divided into several functional blocks: Power Stage:

Features dual motor outputs (M0 and M1) capable of 120A peak current per motor. It includes current shunt resistors (0.0005 ) for precise torque control. Brake Resistor Interface:

Dedicated "Aux" terminals are included for connecting a power resistor to dissipate energy during regenerative braking. Logic & Communication: Connects directly to the STM32 for configuration via the odrivetool CAN and UART:

High-speed interfaces for integration with external microcontrollers or automation systems.

Pins for encoders (ABI, Hall, or SPI), analog inputs, and PWM/Step/Dir control signals. 3. Key Pinout Details Chip Function GPIO 1 & 2 General Purpose I/O GPIO 3 & 4 Serial TX / RX for UART Voltage Monitoring (ADC) M0_AH/BH/CH TIM1 CH1-3 High-side gate control for Motor 0 4. Resources for Full Schematics

Official documentation and design files are maintained in the ODriveHardware GitHub repository PDF Schematic: Direct access to the circuit diagrams is available via the v3.5 Schematic (v3.6 is very similar with minor hardware refinements). 3D Models: CAD files for enclosure planning can be found on the ODrive OnShape page

The ODrive 3.6 is a high-performance, dual-axis brushless DC (BLDC) motor controller designed for precision motion control in robotics and industrial automation. While it has been succeeded by newer models like the ODrive S1 and Pro, the v3.6 remains a popular choice for high-current applications due to its dual-axis capability and open-source heritage. ODrive 3.6 Hardware Specifications

The ODrive 3.6 is available in two main voltage variants to suit different power requirements: 24V Version: Supports an input range of 12V to 24V. 56V Version: Supports an input range of 12V to 56V.

Current Handling: Capable of 120A peak current per motor and 40A continuous current (depending on cooling). Power Output: Supports up to 2kW continuous power per axis. Understanding the ODrive 3.6 Schematic

The schematic for the ODrive 3.6 is logically identical to the earlier v3.5 version. You can find the official design files and schematics in the ODriveHardware GitHub repository. Key sections of the schematic include: I am looking for wiring diagram(schematics) 3.6 56v odrive

3.2 Power Input Protection

The DC input section on the schematic includes:

• Reverse Polarity Protection: Usually implemented via a P-channel MOSFET or ideal diode controller to prevent destruction if the power supply is connected backward.
• TVS Diodes: Transient Voltage Suppressors are placed across the input to clamp voltage spikes caused by inductive loads or regenerative braking.
• Bulk Capacitors: A bank of electrolytic capacitors is positioned near the MOSFETs to stiffen the voltage rail, absorbing ripple current and providing instantaneous current during switching events.

Why Study the ODrive 3.6 Schematic?

Before diving into the schematics, it’s important to understand why you should look beyond the user guide:

1. Troubleshooting Hardware Failures: If a MOSFET blows or a voltage regulator shorts, the schematic helps trace the fault.
2. Custom Firmware & Peripherals: Understanding pin allocation allows you to repurpose GPIOs or add external sensors (e.g., force sensors, limit switches).
3. Designing Integrations: If you are embedding an ODrive into a PCB or custom backplane, you need the pinouts, pull-ups, and power sequencing details.
4. Learning Professional FOC Design: The ODrive is a textbook example of modern BLDC driver architecture.

Common Mistakes When Reading the Schematic

1. Assuming it’s simple: The ODrive 3.6 schematic is not a beginner document. It assumes you know the difference between a pull-up resistor and a current shunt.
2. Ignoring the "Power-Ground" split: If you probe a signal with an oscilloscope, connect the ground clip to the logic ground test point, not the motor ground terminal. The schematic shows they are connected via a ferrite bead—using the wrong ground will destroy your scope probe.
3. Overlooking the 56V limit: The schematic clearly labels the voltage rating of the DC-link capacitors (usually 63V). Feeding 60V will cause the caps to explode regardless of what the MOSFETs can handle.

4. Control and Processing Unit

The brain of the ODrive v3.6 is an STM32F405 or STM32F407 microcontroller from STMicroelectronics.

6. Hall Sensor Inputs (optional)

• 3x Hall per motor (H0, H1, H2) pulled up to 5V

3. Protection Circuitry (The Safety Net)

This is the most criticized section of the v3.6 schematic.

• Reverse Polarity Protection (RPP):
  • The v3.6 uses an ideal diode controller (LM74610) driving a MOSFET for reverse polarity protection.
  • Verdict: Excellent. This prevents the "magic smoke" if you connect the battery backward, without the voltage drop (and heat) of a traditional Schottky diode.
• Over-Voltage / Regenerative Braking:
  • The schematic includes a "brake resistor" MOSFET. When the motor generates back-EMF (braking), the voltage on the bus rises. The firmware turns on this MOSFET to dump energy into an external resistor.
  • Critique: The TVS diodes on the input provide some clamping, but high-voltage spikes from aggressive regen can kill the input capacitors or the gate driver if the brake chopper is too slow. The protection is reactive (firmware dependent) rather than purely hardware-hardened.
• Short Circuit Protection:
  • The DRV8301 provides over-current protection (OCP). However, the schematic lacks hardware fusing on the main power rail. A "shoot-through" or dead-short event relies entirely on the MOSFETs surviving long enough for the driver to shut them off. In many documented cases, a short on v3.6 results in FET failure before the protection logic engages.