Verigy 93k Tester Manual [updated] · Trending & Full
The Verigy 93000 (93k) SOC Series remains a cornerstone of Automated Test Equipment (ATE) for high-performance semiconductors. Navigating its extensive documentation is essential for test engineers looking to optimize throughput and maintain signal integrity. This guide provides a strategic overview of the Verigy 93k tester manual, focusing on the SmarTest environment, hardware configurations, and troubleshooting protocols. Understanding the Verigy 93k Architecture
The 93k platform is designed around a scalable architecture that allows for "per-pin" resources. Unlike traditional testers that share resources across multiple pins, the 93k provides dedicated timing, levels, and pattern memory for each channel. This ensures that complex System-on-Chip (SoC) devices can be tested with maximum precision.
The manual typically divides the system into several key components: The Workstation: Running the SmarTest software environment.
The Test Head: Containing the pin electronics and cooling systems.
The Power Distribution Unit (PDU): Managing the high-current demands of modern processors.
The Manipulator: Providing the mechanical interface to probers or handlers. SmarTest Software Environment
The heart of the 93k manual is the SmarTest documentation. SmarTest is the software suite used to develop, debug, and execute test programs. Engineers must be familiar with the following core tools:
Pin Configuration: This section explains how to map logical device pins to physical tester channels. It covers the setup of different pin types, such as High-Speed Digital, Analog, or Power Supply pins.
Level Setup: Precise voltage levels are critical for CMOS logic. The manual details how to set VIHcap V sub cap I cap H end-sub VILcap V sub cap I cap L end-sub VOHcap V sub cap O cap H end-sub VOLcap V sub cap O cap L end-sub for various drive and receive modes.
Timing and Equations: The 93k uses an equation-based timing system. Instead of hard-coding values, engineers use variables to define cycle times and edge placements, allowing for easy frequency scaling during characterization.
Vector/Pattern Loading: Efficiently managing large pattern files is a recurring theme in the manual. It provides instructions on converting third-party formats (like WGL or STIL) into the native 93k binary format. Key Calibration and Maintenance Procedures
To ensure repeatable results across different testers, the Verigy 93k manual emphasizes strict calibration routines.
Standard Calibration (StdCal): This is a software-driven routine that adjusts for internal tester skews. It should be performed weekly or whenever the test head temperature shifts significantly.
Focused Calibration (FocCal): Used for high-precision applications, this calibrates specific pins to the Device Under Test (DUT) interface board level, compensating for traces and socket parasitics.
Diagnostics: The manual includes a comprehensive list of error codes. Running the "Check Health" diagnostic tool is the first step in troubleshooting any hardware failure, such as a blown fuse or a malfunctioning pin electronics (PE) card. Developing a Test Program
A standard test flow in the 93k environment follows a specific hierarchy outlined in the manual:
Continuity/Open-Shorts: The first line of defense to ensure the DUT is seated correctly. DC Parametrics: Measuring leakage currents ( IILcap I sub cap I cap L end-sub IIHcap I sub cap I cap H end-sub ) and power consumption ( IDDQcap I sub cap D cap D cap Q end-sub
Functional Testing: Executing patterns at speed to verify logic gates.
AC Parametrics: Measuring setup/hold times and propagation delays. Advanced Troubleshooting Tips
When the tester behaves unexpectedly, the manual suggests a "divide and conquer" approach. First, verify the hardware by swapping a suspected bad PE card with a known good one. Second, use the Data View tool in SmarTest to inspect real-time waveforms. This allows you to see exactly where a timing edge is falling relative to the data window.
💡 Pro Tip: Always maintain a "Golden Device." If a test fails across multiple units, run the Golden Device to determine if the issue lies with the tester hardware or the test program itself.
By mastering the Verigy 93k manual, engineers can reduce test time, improve yield, and ensure that only the highest quality silicon reaches the market. Whether you are performing wafer sort or final package test, a deep understanding of SmarTest and the 93k hardware is your most valuable asset.
If you want to dive deeper into a specific area of the 93k system, let me know: SmarTest 7 vs. SmarTest 8 differences High-speed digital setup (multi-Gbps) Analog/Mixed-signal testing modules
The Verigy V93000 (often referred to as the 93k) is a premier Automated Test Equipment (ATE) platform used globally for semiconductor testing. While a technical manual provides the "how-to," an essay on the system explores its architecture, its impact on the industry, and the philosophy behind its "universal" design. The Evolution of Semiconductor Testing: The Verigy V93000
The semiconductor industry is defined by an relentless pursuit of complexity and speed. As chips became smaller and more integrated, the equipment used to verify their functionality had to evolve from simple signal checkers into sophisticated, high-speed computing environments. The Verigy V93000 stands as a landmark in this evolution, representing a shift toward modular, scalable, and software-driven testing. 1. A Modular Philosophy
At the heart of the V93000 is the concept of a "platform." Unlike earlier testers that were hard-wired for specific tasks, the 93k was designed with a universal per-pin architecture. This means every pin on the tester can perform multiple functions—digital, analog, or power—without requiring massive hardware reconfigurations.
Scalability: The system grows with the product. A company can start with a small "A-Class" system and scale up to a "L-Class" or "SmartScale" configuration as their chip complexity increases.
Cost Efficiency: By using a single platform for both engineering development and high-volume manufacturing, companies reduce the "time-to-market." 2. The Role of SmarTest Software verigy 93k tester manual
A tester is only as capable as the software that drives it. The V93000 utilizes the SmarTest environment (SmarTest 7 and the Java-based SmarTest 8). This software allows engineers to:
Model Reality: It simulates the electrical environment the chip will face in the real world.
Automate Debugging: Advanced tools allow for real-time viewing of waveforms and timing, making it easier to find "bugs" in the silicon.
Data Analytics: It collects massive amounts of data to help manufacturers improve their "yield" (the percentage of chips that actually work). 3. Impact on the Digital World
The V93000 is not just a machine; it is the gatekeeper for the modern world. It is used to test the processors in smartphones, the AI chips in data centers, and the automotive sensors in self-driving cars. Without the precision and speed of the 93k, the cost of these electronics would be significantly higher, and their reliability lower. Conclusion
The Verigy V93000 manual is more than a list of instructions; it is a blueprint for quality in the digital age. By bridging the gap between highly specialized engineering and the demands of mass production, the V93000 remains a cornerstone of the semiconductor ecosystem, ensuring that the chips powering our lives are fast, efficient, and—most importantly—reliable. Key Technical Components of the V93000
Test Head: The physical interface where the chip (DUT) is placed.
Workstation: The computer running SmarTest that controls the hardware.
I/O Cards: High-speed cards (like the PS1600 or Pin Scale 1600) that send and receive signals.
Cooling System: Essential for maintaining stability during high-speed testing.
If you are looking for specific information from the manual, I can help you find details on: Specific Error Codes and how to troubleshoot them. SmarTest 7 vs. SmarTest 8 programming differences. Hardware Calibration procedures for specific cards.
Verigy (now Advantest) V93000 (93k) tester manuals are primarily distributed through Advantest's proprietary portals, but several technical guides and reference manuals are available through authorized partners or archive sites. Official Documentation Center The primary source for all current V93000 manuals is the Advantest Technical Documentation Center (TDC) Requires a service agreement and a myAdvantest portal
Includes the SmarTest help system, hardware specifications, and maintenance guides. AI Support:
The TDC now features an AI-powered assistant to help engineers find specific step-by-step guidance through natural language queries. ADVANTEST CORPORATION SmarTest Software & Programming Guides SmarTest Overview:
A detailed breakdown of the software environment used to control the tester, including pin configuration, level setup, and timing. SmarTest 7 Digital Training: Documentation for the Smart Scale
series, covering test flow, calibration, and debugging tools like Shmoo plots. Device License Lab: For software administration, the V93000 Device License Lab Guide provides instructions on using the
license management utility and starting SmarTest in offline mode. Hardware & System Reference Hardware Overview:
Covers the SOC tester platform architecture, water cooling technology, and card cage structure. System Reference: Includes detailed material on system start-up and shutdown
, DUT board mechanical design, and analog module restrictions. Direct-Probe™ Manuals:
Documentation for wafer-stage testing and signal integrity maintenance. Utah Nanofab Third-Party & Auxiliary Guides user guides - CMC Microsystems
To verify the Verigy V93000 (now Advantest V93K) tester manual or documentation, you must access the official myAdvantest portal
, as most technical manuals are protected and require a service agreement. ADVANTEST CORPORATION How to Access the Official Manuals Log in to myAdvantest : Go to the myAdvantest portal Request Software Center Access : If you don't have it, navigate to Self Services Software Center
. Access usually requires an active service agreement with Advantest. Use SmarTest Help : If you are already on a workstation, you can open the Technical Documentation Center (TDC) directly within SmarTest by selecting Help Contents Dynamic Help
: For specific API verification, highlight the API in the Test Method editor and click Dynamic Help to see relevant info from the TDC. ADVANTEST CORPORATION Key Technical Manuals & Resources System Reference
: Covers startup/shutdown, test head components (CTH/STH), and DUT board design. SmarTest Software Overview
: Essential for understanding test flow generation and the Test Method editor. Hardware Overviews
: Provides details on specific modules like the SMU8 (DC measurement) or AVI64 (analog pins). Direct-Probe™ Evolution The Verigy 93000 (93k) SOC Series remains a
: Documentation on wafer probing and signal integrity at the die level. Utah Nanofab Safety & Connection Essentials Terminal Ratings
: Always check the manual for maximum ratings before making connections to prevent fire or shock. Physical Connections
: Ensure proper connection of "air input" (utility box), power cables for the test head (STH/CTH), and Workstation Ethernet before powering up. hardware pinout for a particular card? V93000 Technical Documentation - Advantest
The Advantest (formerly Verigy) V93000 (93k) is a scalable SOC test platform, and its official documentation is primarily managed through the Technical Documentation Center (TDC). Because these manuals are proprietary, you typically need an active service agreement with Advantest to access the full technical library. How to Access Official Manuals
Online TDC: You can browse documentation online or download a standalone version for Windows or Linux from the Advantest MyAdvantest portal.
SmarTest Software: If you have the SmarTest software installed, go to Help > Help Contents to open the integrated documentation.
Software Center: Full PDFs for system components and hardware can be downloaded from the Advantest Software Center once access is approved. Key Manuals and Documentation Areas
The 93k documentation is split into several specialized categories based on user needs:
Hardware Overview: Covers the scalable SOC platform, workstation, water cooling technology, and card cage structure.
System Reference: Detailed reference material on test system components, start-up/shutdown procedures, and analog modules.
DUT Board Design: Mechanical and performance considerations for designing device-under-test (DUT) loadboards.
Instrument Manuals: Specific guides for cards like the Pin Scale 800 digital card, AV8 Analog Card, or DPS32 power supply.
Training & Programming: Lab guides for SmarTest software, testflow setup, pin configuration, and debugging. Third-Party & Add-on Guides
If you are using high-speed extensions or specific twinning frames, you may need supplementary manuals from partners: System Reference - Utah Nanofab
The Verigy V93000, now under the Advantest banner, stands as a cornerstone in the semiconductor industry for its revolutionary "test processor-per-pin" architecture. This essay explores the technical foundations, operational workflows, and historical evolution of this platform, which has defined high-end system-on-chip (SoC) and memory testing for over 25 years. 1. Architectural Foundations: The Test Processor-per-Pin
’s primary innovation is moving the tester intelligence directly into the test head, enabling a single scalable architecture.
Decentralized Intelligence: Unlike traditional testers that share resources across multiple pins, each pin on the Go to product viewer dialog for this item.
has its own dedicated test processor, sequencer, and timing resources.
Scalability: This design allows a single platform to scale from low-cost IoT devices to massive high-performance computing (HPC) and AI chips.
Modular Hardware: The system uses water-cooled building blocks to manage extreme power requirements and density, supporting up to 4096 pins. 2. Operational Framework: SmarTest Software Operating the
requires a deep understanding of its core software, SmarTest (specifically SmarTest 8), which is built on a Linux and Eclipse-based environment.
Test Program Development: Engineers use SmarTest to define "test flows" and "test suites." These organize how the hardware interacts with the Device Under Test (DUT).
Debug Tools: The manual highlights critical diagnostic tools like the Shmoo plot, Margin tool, and Pattern Debugger, which allow engineers to visualize the operational limits of a chip.
Characterization: The platform excels at measuring parametric data—such as eye-width for high-speed memory or error vector magnitude (EVM) for RF transceivers—to ensure chips meet strict performance specifications. 3. Historical Context and Evolution
The V93000 was originally introduced by Hewlett-Packard (HP) in 1999.
The Verigy 93000 (now the Advantest V93000) manual is no longer a single physical book but a massive digital library integrated into the Technical Documentation Center (TDC).
To access the "complete piece," you must use the Advantest TDC Viewer or the help system built into the SmarTest software. Core Manual Components The documentation is organized into these primary sections: Deskew Procedure: How to align signals across multiple
System Reference: Covers hardware properties, test system components, start-up/shutdown, and device power supply (DPS).
SmarTest Software Guides: Detailed instructions for SmarTest 7 (Eclipse-based) or SmarTest 8, including test flow creation, test method coding in C++, and debugging.
Hardware Specifications: Detailed info on pin scale cards (e.g., PS1600, PS9G) and DC scale instruments like DPS128 or UHC4.
DUT Board Design Guidelines: Critical mechanical and electrical specs for designing loadboards and interface hardware. How to Get the Manuals
Because the full documentation contains proprietary details, it is restricted:
Register at myAdvantest Portal: Access requires an active service agreement with Advantest.
Download the TDC Viewer: For Windows 10/11, you must install the standalone TDC application first, then download the specific documentation packages (e.g., Smart Scale or EXA Scale).
Local Linux Access: On V93000 workstations (RHEL), the viewer is typically pre-installed under the Advantest V93000 menu. External Resources
If you don't have a service agreement, you can find high-level overviews and training slides on third-party sites:
General System Overviews: Educational summaries like this V93000 Hardware Overview are available on Scribd.
Partner Manuals: If using third-party extensions, MultiLane provides detailed system manuals for high-speed I/O testing on the V93K platform. V93000 Technical Documentation - Advantest
To access the official Verigy (Advantest) V93000 (93k) tester manuals, you generally need to go through the official manufacturer portal. Because these systems are proprietary, the full technical manuals are rarely available as direct public downloads. Where to Find the Manuals Advantest Software Center (Official) : This is the primary source for all documentation, including
software guides and hardware manuals. You must have a service agreement to request access to the Software Center myAdvantest portal Technical Documentation Center (TDC)
: Advantest provides a standalone help application called the that allows you to navigate and search the complete documentation offline In-Software Help : If you already have the
software installed, you can often access the manual directly by choosing Help > Help Contents within the application. ADVANTEST CORPORATION Manual Content Highlights The V93000 documentation suite typically covers: Hardware Overview
: Details on the scalable platform, water cooling technology, card cage structure, and pogo blocks. SmarTest Software
: Concept overviews, file structures, and guides for the Flow Sequence and Flow Data editors. DUT Board Design
: Mechanical and performance considerations for designing Device Under Test (DUT) loadboards. Safety & Maintenance
: Critical procedures for system start-up, shutdown, and general electrical safety to avoid fire or shock hazards. Supplementary Resources
If you cannot access the official portal, these third-party summaries provide high-level technical details: V93000 Technical Documentation - Advantest
4. Calibration and Maintenance Manual (Volume 4)
- Deskew Procedure: How to align signals across multiple pin cards to within ±50 ps.
- Load Board Design Guidelines: Impedance matching, decoupling capacitors, and relay drivers.
- Error Code Lookup: A full table of error codes (e.g., "E-342: Site Clock Inversion Conflict").
Conclusion
Mastering the Verigy 93K tester manual separates a script kiddie from a true ATE engineer. The manual is not merely instructions; it is the architectural truth of a machine that validates the world’s most advanced silicon. Whether you are debugging a floating DUT pin, writing your first test method, or calibrating an aging testhead, the answer is almost always waiting—somewhere—between the yellowed pages (or ancient PDFs) of the Verigy 93K documentation suite.
Action Step for Today:
Log into your 93K tester, navigate to /opt/hp93000/doc/, type find . -name "*timing*", and open every PDF you find. Within one week, you will reduce your debug time by half.
Keywords integrated: Verigy 93K tester manual, SmarTest, TPP architecture, pattern burst, TIL compiler, test methods, V93000 legacy.
Without direct access to proprietary documents or specific details about your needs (e.g., the exact model within the 93k series, the type of information you're looking for), I'll provide a general outline of what such a manual might cover and how you might go about finding or verifying the information you need.
Part 5: Programming with SmarTest – Extracting Knowledge from the Manual
SmarTest (versions 5, 6, 7, and 8) is the operating environment. The manual describes two primary programming models:
Part 1: Historical Context – Why the “Verigy” Name Still Matters
While Advantest acquired Verigy in 2011, the legacy of the Verigy 93K remains deeply embedded in the hardware and software vernacular. Most existing literature, user forums, and internal company knowledge bases still refer to the Verigy 93K tester manual because the foundational architecture—the Tester Per Pin (TPP) architecture—was solidified under Verigy.
Searching for "Verigy 93K tester manual" yields more precise, older, and sometimes more hardware-focused documents than searching for "Advantest 93K." Recognizing this nuance is key to efficient troubleshooting.